1. Technical Field
The disclosure relates to an analog-to-digital converting (ADC) apparatus.
2. Description of Related Art
Referring to a block diagram of a conventional sub-ranging ADC apparatus 100 shown in FIG. 1, the ADC apparatus 100 includes a plurality of levels of comparing modules 101, 102 and 103, an encoder 120, and a reference signal generator 130. The comparing modules 101, 102 and 103 all receive an input signal VIN in an analog format. The comparing module 101 performs a coarse comparing action on the input signal VIN and reference signals VREF1 to generate a digital comparing result D1.
After the comparing module 101 finishes the coarse comparing action, the comparing module 102 receives a first level of previous encoding result DEN1 generated by the encoder 120. According to the first level of previous encoding result DEN1, the comparing module 102 first selects a group of selected reference signals from reference signals VREF2, and then performs the comparing action on the input signal and the selected reference signals to generate a digital comparing result D2 accordingly. Likewise, after the comparing module 102 finishes the fine comparing action, a next level of comparing module may perform a finer comparing action according to a second level of previous encoding result DEN2 generated by the encoder 120. After a last level of comparing module 103 finishes the comparing action on the input signal and a group of selected reference signals selected from reference signals VREFi according to a penultimate level of previous encoding result DEN(i−1) generated by the encoder 120, the encoder 120 may perform encoding according to a plurality of digital comparing results D1-Di generated by the comparing modules 101-130 (here, i represents a positive integer), and generate an encoding result DOUT, which represents an ADC result of the input signal VIN.